1. Field of the Invention
The present invention generally relates to a method for forming a silicon-on-insulator FET, and more particularly, the present invention relates to the method for forming a silicon-on-insulator FET providing a contact to be given a fixed potential to a substrate reduction of contact resistance on a substrate having a SOI layer isolated with an insulating layer.
This application is counterparts of Japanese application Serial Number 312351/2000, filed Oct. 12, 2000 and Japanese application Serial Number 118227/2001, filed Apr. 17, 2001, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
The conventional SOI FETs have a xe2x80x9cfloating bodyxe2x80x9d in which the body of the FET is located on insulating layer and not electrically connected to a fixed potential. Floating body SOI devices can experience high leakage current and parasitic bipolar action. This disadvantage can be eliminated by providing a contact to the substrate to tie the body to a fixed potential.
In conventional arts, a method for forming a silicon-on-insulator FET providing a contact to be given a fixed potential to a substrate, which is the following.
A silicon-on insulator (SOI) transistor includes transistor region formed in a silicon layer on a substrate via an insulating layer. An interlayer insulating layer overlies the SOI transistor. The SOI transistor includes a conductive contact layer which extends through the interlayer insulating layer, the silicon layer, and the insulating layer. The conductive contact layer fills with a contact hole which is formed by etching the interlayer insulating layer, the silicon layer, and the insulating layer so as to expose a surface of the substrate. The exposed surface of the substrate is implanted ions via the contact hale because of decreasing a contact resistance.
The conventional SOI transistor has a performance disadvantage. Since the contact hole is formed by etching the interlayer insulating layer, the silicon layer and the insulating layer so as to expose a surface of the substrate, it is deep. As a result, a deep contact hole is a high aspect ratio. The ion-implantation to the surface of the substrate via the contact hole is hardly performed. The variation shape of the contact hole contributes to the variation of the contact variation. The contact hole for substrate-biasing is deeper than contact holes of a source, a drain, and a gate in the SOI transistor. If these contact holes are simultaneously formed each of portions, the contact hole for substrate-biasing causes an opening fault because of it is deep contact hole.
An object of the present invention is to provide a method for forming a silicon-on-insulator FET that can be enough to be implanted ions to the surface of the substrate via the contact hole for substrate-biasing. It can form the contact hole for substrate-biasing without the contact hole for substrate-biasing causes an opening fault.
According to one aspect of the present invention, for achieving the above object, there is provided a method for forming a silicon-on-insulator FET providing a contact to be given a fixed potential to a substrate, the method comprising: providing a semiconductor substrate having an insulating layer; forming a silicon layer on the insulating layer; forming a first conductive contact layer extending through the silicon layer and the insulating layer, the first conductive contact layer electrically connected to the substrate; forming an interlayer-insulating layer overlying the silicon layer; forming a through-hole in the interlayer-insulating layer, the through-hole forming so as to correspond to the first conductive contact layer; and filling a second conductive contact layer in the through-hole.